VP=VREF_DIVIDER_0, VLADREF=VREF_CMP_PIN, INTEDGE=FALLING, INTTYPE=EDGE, INTFLAG=NOT_PENDING, HYS=HYSTERESIS_IS_TURNED, VM=VREF_DIVIDER_0, INTEN=DISABLED, EN=DISABLED, VLADEN=DISABLED, INTPOL=NOT_INVERTED
Comparator 0 source control
| EN | Comparator enable control. 0 (DISABLED): Disabled. Comparator disabled. 1 (ENABLED): Enabled. Comparator is enabled. |
| RESERVED | Reserved. |
| INTEN | Interrupt enable. 0 (DISABLED): Disabled. Interrupts are disabled… 1 (ENABLED): Enabled. Interrupts are enabled… Must set to 1 for interrupts to propagate to the NVIC and start-up logic. |
| STAT | Comparator status. This bit reflects the comparator output |
| VM | VM input select. 0 (VREF_DIVIDER_0): Vref divider 0. 1 (ACMP_I1): ACMP_I1. 2 (ACMP_I2): ACMP_I2. 3 (ACMP0_I3): ACMP0_I3. 4 (ACMP0_I4): ACMP0_I4. 5 (INTERNAL_0): Internal 0.9 V band gap reference. 6 (TEMP_SENSOR): Temp sensor. 7 (ADC0_2): ADC0_2. Input for ADC0 channel 2. |
| RESERVED | Reserved. |
| VP | VP input select. 0 (VREF_DIVIDER_0): Vref divider 0. 1 (ACMP_I1): ACMP_I1. 2 (ACMP_I2): ACMP_I2. 3 (ACMP0_I3): ACMP0_I3. 4 (ACMP0_I4): ACMP0_I4. 5 (INTERNAL_0): Internal 0.9 V band gap reference. 6 (TEMP_SENSOR): Temp sensor. 7 (ADC0_2): ADC0_2. Input for ADC0 channel 2. |
| RESERVED | Reserved. |
| HYS | Hysteresis control. When enabled, hysteresis determines the difference required between the comparator inputs before the comparator output switches. The difference must be in the direction opposite of the current comparator output. 0 (HYSTERESIS_IS_TURNED): Hysteresis is turned off, comparator output will change as the input voltages cross. 1 (HYSTERESIS_EQ_5_MV): Hysteresis = 5 mV. 2 (HYSTERESIS_EQ_10_MV): Hysteresis = 10 mV. 3 (HYSTERESIS_EQ_15_MV): Hysteresis = 15 mV. |
| INTPOL | Selects the polarity of the CMP output for purposes of generating level interrupts. 0 (NOT_INVERTED): Not inverted. The output is used as-is for generating interrupts. 1 (INVERTED): Inverted. The output is used inverted for generating interrupts. |
| INTTYPE | Select interrupt type. 0 (EDGE): Edge. Comparator interrupt is edge triggered. 1 (LEVEL): Level. Comparator interrupt is level triggered. |
| INTEDGE | Select edge triggered interrupt to be active on either high or low transitions, when INTTYPE = 0. 0 (FALLING): Falling. Comparator interrupt is active on falling edges. 1 (RISING): Rising. Comparator interrupt is active on rising edges. 2 (BOTH_EDGES): Both edges. Comparator Interrupt is active on both edges. 3 (RESERVED): Reserved. |
| INTFLAG | Interrupt flag. 0 (NOT_PENDING): Not pending. The Comparator interrupt is not pending. 1 (PENDING): Pending. The Comparator interrupt is pending. Writing a 1 to this bit clears the flag. |
| VLADEN | Voltage ladder enable for comparator 0. 0 (DISABLED): Disabled. The Comparator voltage ladder is disabled. 1 (ENABLED): Enabled. The Comparator voltage ladder is enabled. |
| RESERVED | Reserved. |
| VLADREF | Voltage reference select for comparator 0 voltage ladder. 0 (VREF_CMP_PIN): VREF_CMP pin. 1 (VDDA_PIN): VDDA pin. |
| RESERVED | Reserved. |
| VSEL | Voltage ladder value for comparator 0. The reference voltage Vref depends on the setting of VLADREF (either VDD(3V3) or voltage on pin VREF_CMP). 00000 = Vss. 00001 = 1 x Vref / 31. 00010 = 2 x Vref / 31. … 11111 = Vref |
| DLY | Configure the propagation delay. A shorter propagation delay means higher power consumption. Use values from 0x0 (shortest propagation delay and highest power consumption) to 0x2 (longest propagation delay and lowest power consumption). See the data sheet for details. |
| RESERVED | Reserved. |